AMD’s Helios Rack Turns the Vera Rubin Rivalry Into a Software Race

AMD introduced Helios, its first complete rack-scale AI computing system, at its Advancing AI 2026 event in San Francisco this week. Spec for spec, the numbers are striking: more memory, more bandwidth, and more peak compute than Nvidia’s competing Vera Rubin platform, according to The Register. But that comparison comes with an important caveat: peak numbers rarely translate directly into real-world performance, and that gap is exactly where this rivalry will actually be decided.

What Helios Actually Is

Helios addresses a structural problem AMD has faced for years: Nvidia does not just sell chips, it sells complete, integrated rack systems, and AMD has historically sold components for other companies to assemble. That changed in 2025, when AMD paid $4.9 billion to acquire server maker ZT Systems for its systems-design engineering team, then sold ZT’s actual manufacturing business for $3 billion to avoid competing with its own customers, the server builders that assemble and sell AMD-based systems, according to DataCenterDynamics.

Helios is a complete rack combining 72 Instinct MI455X GPUs, AMD’s sixth-generation Epyc “Venice” server CPUs, Pensando networking cards, and AMD’s ROCm software stack, all built into a single Open Rack Wide (ORW) frame, a double-width rack format defined by the Open Compute Project that spans 1,200mm, or about 47 inches. That is nearly twice the width of Nvidia’s competing NVL72 rack. The finished system weighs approximately 5,000 pounds and is cooled entirely by liquid, delivered through a 50-volt DC busbar and rear quick-disconnect cooling lines.

Traditional AI racks connect separate GPU servers over scale-out networks, with each server managing its own memory, typically adding latency and congestion across multiple network hops. Helios pools memory across the entire rack instead. Mark Chubb, AMD’s corporate vice president of platform architecture and a former ZT Systems executive, described the design at a press briefing covered by DataCenterDynamics: Helios creates “one unified 72 GPU system, all with 31 terabytes of shared HBM memory that is interconnected through a single hop.”

Inside the MI455X: AMD’s Biggest Chip Yet

A Chiplet Sandwich Built on Two Process Nodes

The GPU powering Helios, the Instinct MI455X, is built on AMD’s fifth-generation CDNA compute architecture. Like its MI300-series predecessors, it is not one piece of silicon but a chiplet design, stitched together using TSMC’s advanced packaging technology. Eight compute dies are fabricated on TSMC’s 2-nanometer process, AMD’s most advanced node to date, and are stacked on top of a pair of “fabric and cache dies,” or FCDs, built on a 3-nanometer process, according to The Register’s breakdown of the chip.

Each FCD works as a cache-heavy interposer, packing 96 MB of L2 cache and the memory controllers for 12 stacks of 36 GB HBM4 memory, 432 GB in total per chip. Two further 3-nanometer dies, separate from the compute stack, handle chip-to-chip communication, a change from prior Instinct chips that placed the I/O die directly beneath the compute dies. In total, including its memory stacks, the MI455X packs 24 chiplets using a mix of 2.5D and 3D packaging. The design also allows a single MI455X to function as one large GPU, split into two smaller ones, or partitioned into as many as eight virtual GPUs, depending on the workload.

Betting on Low-Precision AI Math

AMD replaced the “Infinity Cache” used in earlier Instinct chips with the larger, shared L2 design. “The bandwidth delivered for one of these L2 caches in MI455X is 1.5x the aggregate bandwidth of the Infinity cache on MI355X,” AMD fellow Alan Smith told The Register. Combined with a new direct memory access engine built to minimize data movement, AMD says the MI455X delivers as much as four times the floating point performance of last year’s MI355X on AI workloads.

Getting there required a trade-off: the MI455X drops FP64 (double-precision floating point) support entirely, dedicating that die area instead to the low-precision data types AI training and inference actually use, including MXFP4 and MXFP8, along with new 16- and 32-block scale data types. Customers who still need FP64 for traditional scientific computing are directed instead to a separate SKU in AMD’s lineup, the MI430X, built for high-performance computing and sovereign AI workloads.

Helios vs. Vera Rubin, Spec for Spec

AMD is comparing Helios directly against Nvidia’s Vera Rubin NVL72 rack, which is shipping on a similar timeline. Measured against Vera Rubin’s published specifications, AMD claims Helios delivers 15 percent more peak FP4 compute, 50 percent more HBM capacity, 6 percent more HBM bandwidth, and 50 percent more scale-out network bandwidth, according to DataCenterDynamics. A single Helios rack is rated at up to 2.9 exaflops of peak FP4 throughput, 1.4 exaflops of peak FP8 throughput, 31 terabytes of pooled HBM4 memory, and 1.7 petabytes per second of memory bandwidth. AMD separately told The Register that Helios’s edge on AI training workloads specifically runs between 15 and 25 percent, and that it expects Helios to deliver up to 30 percent more tokens per dollar than the competition, a performance-per-cost metric aimed at the economics that matter most to hyperscalers buying racks by the thousand.

The Register’s own reporting adds an important qualifier: Nvidia’s Vera Rubin uses adaptive compression technology that AMD believes gives it roughly a 25 percent lead over Helios on FP4, though that advantage appears limited to inference workloads that can actually use compression. Outside that specific case, AMD says Helios offers 15 percent higher peak FP4 throughput.

On networking, Helios uses six Broadcom Tomahawk 6 switch ASICs, rated at 102.4 Tbps each, spread across its switch trays, paired with up to three AMD Pensando “Vulcano” 800 Gbps network cards per GPU for scale-out traffic, a combined 2.4 Tbps per accelerator. That compares with a single 1.6 Tbps Nvidia ConnectX-9 superNIC per GPU on Vera Rubin, according to The Register.

Why “On Paper” Is the Operative Phrase

The Register’s coverage is careful to explain why these numbers deserve some skepticism. Peak theoretical FLOPS are a mathematical ceiling, not a real-world measurement. Modern accelerators do not run at a fixed clock; they follow boost curves shaped by available power and thermal headroom, and liquid cooling only pushes that ceiling so far. Real workloads introduce another variable: AI training and inference are dominated by matrix multiplication, and when a workload’s matrix shape does not match what the hardware is optimized for, achievable performance falls well short of the number on a spec sheet. Poorly optimized GPU kernels or software libraries widen that gap further.

This is where history complicates AMD’s pitch. AMD’s software stack, ROCm, has long been considered less mature than Nvidia’s CUDA ecosystem at the level of kernel optimization and developer tooling, the layer that determines how much of a chip’s peak performance actually reaches a customer’s workload. Winning the spec sheet is necessary for AMD to be taken seriously at rack scale. It is not sufficient to close a gap that has persisted at the software layer for years, which is exactly why peak-versus-achievable performance, not the spec sheet alone, is the right test to apply to Helios.

The Customers Betting on Helios Anyway

Despite that caveat, AMD’s spec win has not stopped major buyers from committing to Helios. Meta, Microsoft, and Oracle are already customers, according to The Register, and Microsoft separately confirmed plans to deploy the new rack in its own data centers earlier this week, according to DataCenterDynamics. OpenAI has committed to deploying gigawatts of MI455X capacity in exchange for a roughly 10 percent stake in AMD. Separately, Anthropic agreed to deploy up to 2 gigawatts of AMD Instinct MI450-series GPUs in Helios racks, with the first gigawatt beginning in the first half of 2027, in exchange for AMD’s strategic investment of up to $5 billion in Anthropic, a deal AMD and Anthropic announced on July 22 and that sxz.io covered in detail.

AMD says Helios has entered full production, with the first shipments to customers, including Microsoft, expected by the end of the third quarter of 2026, according to DataCenterDynamics.

The Rest of AMD’s Rack-Scale Lineup

Helios is AMD’s flagship platform, but not every customer needs a rack that draws more than 225 kW. Alongside the MI455X, AMD’s CDNA 5 lineup includes the MI450X, aimed at large-scale training and inference outside the full Helios configuration, and the MI430X, which keeps FP64 support for traditional high-performance computing and sovereign AI workloads. The MI430X has already secured two major supercomputing contracts: EuroHPC’s Alice Recoque system and Oak Ridge National Laboratory’s Discovery system, expected online in 2027 and 2028 respectively, according to The Register.

On the CPU side, AMD’s sixth-generation Epyc “Venice” processors are rolling out in stages. The SP7 variant used in Helios is already in production, while the higher-end SP8 and Venice X variants are due to arrive next year.

The Real Contest Is Just Starting

Helios is the clearest evidence yet that AMD is serious about competing with Nvidia at the level of complete systems, not just individual chips, a shift made possible by absorbing ZT Systems’ rack-engineering expertise. But a rivalry this large was never going to be settled by a spec sheet. It will be settled by whichever company’s software stack lets customers actually capture the performance both vendors are now promising on paper, and for AMD, that contest is only beginning.